====== KUSZ ======


FPGA-Implementation:

===== Error sources: =====

We compare the output of BB1 and BB2.

BB1 receives a perfect **SIGNAL** and should alway receive the correct **DATA**.
BB2 receives a distorted **SIGNAL** therefor errors can and will occur.


==== Synchronization Error ====

sync_error: sync_ok too early or too late\\

synchronization is correct when the sync_ok signal occurs at the same time or delayed by one clock_cycle

==== PHR Error ====